[Resource Topic] 2024/1828: Classic McEliece Hardware Implementation with Enhanced Side-Channel and Fault Resistance

Welcome to the resource topic for 2024/1828

Title:
Classic McEliece Hardware Implementation with Enhanced Side-Channel and Fault Resistance

Authors: Peizhou Gan, Prasanna Ravi, Kamal Raj, Anubhab Baksi, Anupam Chattopadhyay

Abstract:

In this work, we propose the first hardware implementation
of Classic McEliece protected with countermeasures
against Side-Channel Attacks (SCA) and Fault Injection Attacks
(FIA). Classic Mceliece is one of the leading candidates for Key
Encapsulation Mechanisms (KEMs) in the ongoing round 4 of
the NIST standardization process for post-quantum cryptography.
In particular, we implement a range of generic countermeasures
against SCA and FIA, particularly protected the vulnerable
operations such as additive Fast Fourier Transform (FFT) and
Gaussian elimination, that have been targeted by prior SCA
and FIA attacks. We also perform a detailed SCA evaluation
demonstrating no leakage even with 100000 traces (improvement
of more than 100× the number of traces compared to unprotected
implementation). This comes at a modest total area overhead
of between 4× to 7×, depending on the type of implemented
SCA countermeasure. Furthermore, we present a thorough ASIC
benchmark for SCA and FIA protected Classic McEliece design

ePrint: https://eprint.iacr.org/2024/1828

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