[Resource Topic] 2019/1152: Active Fences against Voltage-based Side Channels in Multi-Tenant FPGAs

Welcome to the resource topic for 2019/1152

Active Fences against Voltage-based Side Channels in Multi-Tenant FPGAs

Authors: Jonas Krautter, Dennis R. E. Gnad, Falk Schellenberg, Amir Moradi, Mehdi B. Tahoori


Dynamic and partial reconfiguration together with hardware parallelism make FPGAs attractive as virtualized accelerators. However, recently it has been shown that multi-tenant FPGAs are vulnerable to remote side-channel attacks (SCA) from malicious users, allowing them to extract secret keys without a logical connection to the victim core. Typical mitigations against such attacks are hiding and masking schemes, to increase attackers’ efforts in terms of side-channel measurements. However, they require significant efforts and tailoring for a specific algorithm, hardware implementation and mapping. In this paper, we show a hiding countermeasure against voltage-based SCA that can be integrated into any implementation, without requiring modifications or tailoring to the protected module. We place a properly mapped Active Fence of ring oscillators between victim and attacker circuit, enabled as a feedback of an FPGA-based sensor, leading to reduced side-channel leakage. Our experimental results based on a Lattice ECP5 FPGA and an AES-128 module show that two orders of magnitude more traces are needed for a successful key recovery, while no modifications to the underlying cryptographic module are necessary.

ePrint: https://eprint.iacr.org/2019/1152

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