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Title:
Hardware Implementation of the SHA-3 Candidate Skein
Authors: Stefan Tillich
Abstract:Skein is a submission to the NIST SHA-3 hash function competition which has been optimized towards implementation in modern 64-bit processor architectures. This paper investigates the performance characteristics of a high-speed hardware implementation of Skein with a 0.18,\textmu}m standard-cell library and on different modern FPGAs. The results allow a first comparison of the hardware performance figures of full Skein with other SHA-3 candidates.
ePrint: https://eprint.iacr.org/2009/159
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