[Resource Topic] 2009/129: Faster and Timing-Attack Resistant AES-GCM

Welcome to the resource topic for 2009/129

Title:
Faster and Timing-Attack Resistant AES-GCM

Authors: Emilia Kasper, Peter Schwabe

Abstract:

We present a bitsliced implementation of AES encryption in counter mode for 64-bit Intel processors. Running at 7.59 cycles/byte on a Core~2, it is up to 25% faster than previous implementations, while simultaneously offering protection against timing attacks. In particular, it is the only cache-timing-attack resistant implementation offering competitive speeds for stream as well as for packet encryption: for 576-byte packets, we improve performance over previous bitsliced implementations by more than a factor of 2. We also report more than 30% improved speeds for lookup-table based Galois/Counter mode authentication, achieving 10.68 cycles/byte for authenticated encryption. Furthermore, we present the first constant-time implementation of AES-GCM that has a reasonable speed of 21.99 cycles/byte, thus offering a full suite of timing-analysis resistant software for authenticated encryption.

ePrint: https://eprint.iacr.org/2009/129

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