Welcome to the resource topic for 2005/065
Title:
Efficient hardware for the Tate pairing calculation in characteristic three
Authors: T. Kerins, W. P. Marnane, E. M. Popovici, P. S. L. M. Barreto
Abstract:In this paper the benefits of implementation of the Tate pairing
computation in dedicated hardware are discussed. The main
observation lies in the fact that arithmetic architectures in the
extension field GF(3^{6m}) are good candidates for
parallelization, leading to a similar calculation time in hardware
as for operations over the base field GF(3^m). Using this
approach an architecture for the hardware implementation of the
Tate pairing calculation based on a modified Duursma-Lee algorithm
is proposed.
ePrint: https://eprint.iacr.org/2005/065
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